Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 92
3.6.10.8.2 Operation
NOP
does nothing.
NOP
is not necessarily a time-consuming
NOP
. The processor might remove it from the
pipeline before it reaches the execution stage.
Use
NOP
for padding, for example to adjust the alignment of a following instruction.
3.6.10.8.3 Condition Flags
This instruction does not change the flags.
Examples
NOP ; No operation
3.6.10.9 SEV
Send Event.
3.6.10.9.1 Syntax
SEV{cond}
where:
cond is an optional condition code, see Conditional Execution, page 55.
3.6.10.9.2 Operation
SEV
is a hint instruction that causes an event to be signaled to all processors within a multiprocessor
system. It also sets the local event register to 1, see Power Management, page 45.
3.6.10.9.3 Condition Flags
This instruction does not change the flags.
Examples
SEV ; Send Event
3.6.10.10 SVC
Supervisor Call.
3.6.10.10.1 Syntax
SVC{cond} #imm
where:
cond is an optional condition code, see Conditional Execution, page 55.
imm is an expression evaluating to an integer in the range 0-255 (8-bit value).
3.6.10.10.2 Operation
The
SVC
instruction causes the
SVC
exception.
imm
is ignored by the processor. If required, it can be retrieved by the exception handler to determine
what service is being requested.
3.6.10.10.3 Condition Flags
This instruction does not change the flags.
Examples
SVC #0x32 ; Supervisor Call (SVCall handler can extract the immediate value
; by locating it via the stacked PC)
3.6.10.11 WFE
Wait For Event.
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