Microsemi SmartFusion2 - Page 125

Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 91
3.6.10.6.2 Operation
Use MRS in combination with MSR as part of a read-modify-write sequence for updating a PSR, for
example to clear the Q flag.
Note:
BASEPRI_MAX is an alias of BASEPRI when used with the MRS instruction. See MSR, page 92.
3.6.10.6.3 Restrictions
Rd must not be SP and must not be PC.
3.6.10.6.4 Condition Flags
This instruction does not change the flags.
Examples
MRS R0, PRIMASK ; Read PRIMASK value and write it to R0.
3.6.10.7 MSR
Move the contents of a general-purpose register into the specified special register.
3.6.10.7.1 Syntax
MSR{cond} spec_reg, Rn
where:
cond is an optional condition code, see Conditional Execution, page 55.
Rn is the source register.
spec_reg can be any of:
APSR , IPSR , EPSR , IEPSR , IAPSR , EAPSR , PSR , MSP , PSP , PRIMASK , BASEPRI ,
BASEPRI_MAX , FAULTMASK , or CONTROL .
Note: The processor ignores
MSR writes to the EPSR and IPSR fields.
3.6.10.7.2 Operation
The register access operation in MSR depends on the privilege level. Unprivileged software can only
access the APSR , see Table 10, page 23. Privileged software can access all special registers.
In unprivileged software writes to unallocated or execution state bits in the
PSR are ignored.
Note: When you write to
BASEPRI_MAX , the instruction writes to BASEPRI only if either:
•
Rn is non-zero and the current BASEPRI value is 0
• Rn is non-zero and less than the current BASEPRI value.
See MRS, page 91
3.6.10.7.3 Restrictions
Rn must not be SP and must not be PC.
3.6.10.7.4 Condition Flags
This instruction updates the flags explicitly based on the value in Rn.
Examples
MSR CONTROL, R1 ; Read R1 value and write it to the CONTROL register.
3.6.10.8 NOP
No Operation.
3.6.10.8.1 Syntax
NOP{cond}
where:
cond is an optional condition code, see Conditional Execution, page 55.