Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 55
You can execute an instruction conditionally, based on the condition flags set in another instruction,
either:
• Immediately after the instruction that updated the flags
• After any number of intervening instructions that have not updated the flags.
Conditional execution is available by using conditional branches or by adding condition code suffixes to
instructions. See Table 29, page 57 for a list of the suffixes to add to instructions to make them
conditional instructions. The condition code suffix enables the processor to test a condition based on the
flags. If the condition test of a conditional instruction fails, the instruction:
• Does not execute
• Does not write any value to its destination register
• Does not affect any of the flags
• Does not generate any exception.
Conditional instructions, except for conditional branches, must be inside an If-Then instruction block. See
IT, page 85 for more information and restrictions when using the
IT
instruction. Depending on the vendor,
the assembler might automatically insert an
IT
instruction if you have conditional instructions outside the
IT block.
Use the
CBZ
and
CBNZ
instructions to compare the value of a register against zero and branch on the
result.
This section describes the condition flags and condition code suffixes.
3.6.3.7.1 Condition Flags
The APSR contains the following condition flags:
N: Set to 1 when the result of the operation was negative, cleared to 0 otherwise.
Z: Set to 1 when the result of the operation was zero, cleared to 0 otherwise.
C: Set to 1 when the operation resulted in a carry, cleared to 0 otherwise.
V: Set to 1 when the operation caused overflow, cleared to 0 otherwise.
For more information about the APSR, refer to Program Status Register, page 22.
A carry occurs:
• If the result of an addition is greater than or equal to 2
32
• If the result of a subtraction is positive or zero
• As the result of an inline barrel shifter operation in a move or logical instruction
Overflow occurs when the sign of the result, in bit[31], does not match the sign of the result had the
operation been performed at infinite precision, for example:
• If adding two negative values results in a positive value
• If adding two positive values results in a negative value
• If subtracting a positive value from a negative value generates a positive value
• If subtracting a negative value from a positive value generates a negative value
The Compare operations are identical to subtracting, for
CMP
, or adding, for
CMN
, except that the result is
discarded. See the instruction descriptions for more information. Most instructions update the status flags
only if the
S
suffix is specified. See the instruction descriptions for more information.
3.6.3.7.2 Condition Code Suffixes
The instructions that can be conditional have an optional condition code, shown in syntax descriptions as
{cond}
. Conditional execution requires a preceding
IT
instruction. An instruction with a condition code is
only executed if the condition code flags in the APSR meet the specified condition. The following table
shows the condition codes to use. You can use conditional execution with the
IT
instruction to reduce the
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