Microsemi SmartFusion2 - Page 97

Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 63
3.6.4.5.3 Restrictions
In these instructions:
•
Rt can be SP or PC only for word loads
• Rt2 must not be SP and must not be PC
• Rt must be different from Rt2.
When Rt is PC in a word load instruction:
• bit[0] of the loaded value must be 1 for correct execution, and a branch occurs to this halfword-
aligned address
• if the instruction is conditional, it must be the last instruction in the IT block.
3.6.4.5.4 Condition Flags
These instructions do not change the flags.
Examples
LDR R0, LookUpTable ; Load R0 with a word of data from an address
; labelled as LookUpTable
LDRSB R7, localdata ; Load a byte value from an address labelled
; as localdata, sign extend it to a word
; value, and put it in R7.
3.6.4.6 LDM and STM
Load and Store Multiple registers.
3.6.4.6.1 Syntax
op{addr_mode}{cond} Rn{!}, reglist
where:
• op is one of:
• LDM (Load Multiple registers)
• STM (Store Multiple registers)
• addr_mode is one of:
• IA (Increment address After each access.) This is the default.
• DB (Decrement address Before each access.)
• cond is an optional condition code, see Conditional Execution, page 55.
• Rn is the register on which the memory addresses are based.
• ! is an optional writeback suffix. If
! is present the final address, that is loaded from or stored to, is
written back into Rn .
• reglist is a list of one or more registers to be loaded or stored, enclosed in braces. It can contain
register ranges. It must be comma separated if it contains more than one register or register range.
LDM and LDMFD are synonyms for LDMIA . LDMFD refers to its use for popping data from Full Descending
stacks.
LDMEA is a synonym for LDMDB , and refers to its use for popping data from Empty Ascending stacks.
STM and STMEA are synonyms for STMIA . STMEA refers to its use for pushing data onto Empty Ascending
stacks.
STMFD is s synonym for STMDB , and refers to its use for pushing data onto Full Descending stacks.
3.6.4.6.2 Operation
LDM instructions load the registers in reglist with word values from memory addresses based on Rn .
STM instructions store the word values in the registers in reglist to memory addresses based on Rn .
For
LDM , LDMIA , LDMFD , STM , STMIA , and STMEA the memory addresses used for the accesses are at 4-
byte intervals ranging from Rn to Rn + 4 * ( n -1), where n is the number of registers in reglist . The accesses