Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 64
happens in order of increasing register numbers, with the lowest numbered register using the lowest
memory address and the highest number register using the highest memory address. If the writeback
suffix is specified, the value of
Rn
+ 4 * (
n
-1) is written back to
Rn
.
For
LDMDB
,
LDMEA
,
STMDB
, and
STMFD
the memory addresses used for the accesses are at 4-byte
intervals ranging from
Rn
to
Rn
- 4 * (
n
-1), where
n
is the number of registers in
reglist
. The accesses
happen in order of decreasing register numbers, with the highest numbered register using the highest
memory address and the lowest number register using the lowest memory address. If the writeback
suffix is specified, the value of
Rn
- 4 * (
n
-1) is written back to
Rn
.
The
PUSH
and
POP
instructions can be expressed in this form. See PUSH and POP, page 65 for details.
3.6.4.6.3 Restrictions
In these instructions:
•
Rn
must not be PC
•
reglist
must not contain SP
• in any
STM
instruction,
reglist
must not contain PC
• in any
LDM
instruction,
reglist
must not contain PC if it contains LR
•
reglist
must not contain
Rn
if you specify the writeback suffix.
When PC is in
reglist
in an
LDM
instruction:
• bit[0] of the value loaded to the PC must be 1 for correct execution, and a branch occurs to this
halfword-aligned address
• if the instruction is conditional, it must be the last instruction in the IT block.
3.6.4.6.4 Condition Flags
These instructions do not change the flags.
Examples
LDM R8,{R0,R2,R9} ; LDMIA is a synonym for LDM
TMDB R1!,{R3-R6,R11,R12}
Incorrect Examples
STM R5!,{R5,R4,R9} ; Value stored for R5 is unpredictable
LDM R2, {} ; There must be at least one register in the list.
3.6.4.7 PUSH and POP
Push registers onto, and pop registers off a full-descending stack.
3.6.4.7.1 Syntax
PUSH{cond} reglist
POP{cond} reglist
where:
cond is an optional condition code, see Conditional Execution, page 55.
reglist is a non-empty list of registers, enclosed in braces. It can contain register ranges. It must be
comma separated if it contains more than one register or register range.
PUSH
and
POP
are synonyms for
STMDB
and
LDM
(or
LDMIA
) with the memory addresses for the access
based on SP, and with the final address for the access written back to the SP.
PUSH
and
POP
are the
preferred mnemonics in these cases.
3.6.4.7.2 Operation
PUSH
stores registers on the stack, with the lowest numbered register using the lowest memory address
and the highest numbered register using the highest memory address.
POP
loads registers from the stack, with the lowest numbered register using the lowest memory address
and the highest numbered register using the highest memory address.