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Microsemi SmartFusion2
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Cortex-M3 Processor (Reference Material)
UG0331 User Guide Revision 15.0 69
If you want to generate the address of an instruction, you have to adjust the constant based on
the value of the PC. ARM recommends that you use the
ADR
instruction instead of
ADD
or
SUB
with
Rn
equal to the PC, because your assembler automatically calculates the correct constant
for the
ADR
instruction.
When
Rd
is PC in the
ADD{cond} PC, PC, Rm
instruction:
bit[0] of the value written to the PC is ignored
a branch occurs to the address created by forcing bit[0] of that value to 0.
3.6.5.1.4 Condition Flags
If
S
is specified, these instructions update the N, Z, C and V flags according to the result.
Examples
ADD R2, R1, R3
SUBS R8, R6, #240 ; Sets the flags on the result
RSB R4, R4, #1280 ; Subtracts contents of R4 from 1280
ADCHI R11, R0, R3 ; Only executed if C flag set and Z
; flag clear.
3.6.5.1.5 Multiword Arithmetic Examples
The following example shows two instructions that add a 64-bit integer contained in
R2
and
R3
to another
64-bit integer contained in
R0
and
R1
, and place the result in
R4
and
R5
.
Example 4
64-bit addition
ADDS R4, R0, R2 ; add the least significant words
ADC R5, R1, R3 ; add the most significant words with carry
Multiword values do not have to use consecutive registers. The following example shows instructions
that subtract a 96-bit integer contained in R9, R1, and R11 from another contained in R6, R2, and R8.
The example stores the result in R6, R9, and R2.
Example 5
96-bit subtraction
SUBS R6, R6, R9 ; subtract the least significant words
SBCS R9, R2, R1 ; subtract the middle words with carry
SBC R2, R8, R11 ; subtract the most significant words with carry
3.6.5.2 AND, ORR, EOR, BIC, and ORN
Logical AND, OR, Exclusive OR, Bit Clear, and OR NOT.
3.6.5.2.1 Syntax
op{S}{cond} {Rd,} Rn, Operand2
where:
op is one of:
AND:
logical AND.
ORR
: logical OR, or bit set.
EOR
: logical Exclusive OR.
BIC
: logical AND NOT, or bit clear.
ORN
: logical OR NOT.
S is an optional suffix. If
S
is specified, the condition code flags are updated on the result of the
operation, see Conditional Execution, page 55.
cond is an optional condition code, see Conditional Execution, page 55.

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