Analog Devices SHARC ADSP-21368 - Page 176

SDRAM Controller
3-68 ADSP-21368 SHARC Processor Hardware Reference
Figure 3-11. Read Timing Diagram ADSP-21367/8/9
Figure 3-12. Write Timing Diagram (ADSP-2137x, Full Page Burst))
SDCLK
COMMAND
AC T
ACT
NOP
NOP
PRERD RD NOP NOP NOP
COL COL
AA
DD
ROW
A
ROW
A
t
RAS
t
RCD
t
RP
CL
t
RC
ADDR
BA[1:0]
DATA
SDA10
SD CLK
COMMAND ACT
ACT
NOP
NOP
PREWR WR WR WR BST
COL COL COL COL
AAAA
DDDD
ROW
A A
RO W
A
t
RAS
t
RCD
t
RP
t
WR
t
RC
ADDR
BA[1:0]
DATA
SDA10
u