ADSP-21368 SHARC Processor Hardware Reference 10-23
Asynchronous Sample Rate Converter
For information on using the SRU, see “Making Connections in the
SRUs” on page 4-15, and “DAI/SRU1 Connection Groups” on
page 4-18.
SRC Mute-Out Interrupt
Once the SRC is locked (after 4K input samples), the corresponding
SRCx_MUTE_OUT bit in the DAI_IRPTL_H/L register is set. This generates the
DAI_INTH/L interrupt. From this point, the SRC produces output serial
data at the output sampling frequency. The SRC mute signals can be used
to generate interrupts on their leading edge, falling edge, or both, depend-
ing on how the DAI_IRPT_RE/FE registers are programmed.
Sample Rate Ratio
Once the SRC mute interrupt has triggered, the SRCRAT0 and SRCRAT1 reg-
isters can be read to find the ratio of output to input sampling frequency.
This ratio is reported in 4.11 (integer.fraction) format.
Programming Summary
Since the SRC data is not available to the core, programming the SRC
peripheral involves simply connecting the SRU to the on-chip (serial ports
or input data port) or off-chip (DAI pins) serial devices. These devices
provide the clock and data to be converted, and select the desired operat-
ing mode in the SRC control register. This setup can be accomplished in
two steps.
1. Connect each of the four SRCs to their two serial clocks
(SRCx_CLK_IP_I, SRCx_CLK_OP_I) and frame sync inputs
(
SRCx_FS_IP_I, SRCx_FS_OP_I). Also connect one data input
(SRCx_DAT_IP_I) and one data output (SRCx_DAT_OP_O) in the SRU.
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