DAI Programming Examples
9-26 ADSP-21368 SHARC Processor Hardware Reference
SRU1 Programming
The SRU1 needs to be programmed in order to connect the S/PDIF
receiver to the output pins or any other peripherals and also for the input
bi-phase stream.
Program the corresponding SRU1 registers to connect the above outputs
to the required destination. See “SRU1 Receiver Signals” on page 9-18,
“Group A Connections—Clock Signals” on page 4-19, and “Group C
Connections—Frame Sync Signals” on page 4-31.
Control Register Programming
After SRU1 programming is complete, write to the
SPDIF_RX_CTL register
with control values, and enable the internal digital PLL by clearing the
DIR_PLLDIS bit if it was cleared initially. At this point, the receiver
attempts to lock.
Receiver Locking
Once the receiver is locked, the corresponding LOCK bit in the DIRSTAT reg-
ister is set. This bit can be polled to detect the LOCK condition. Another
option is to use the SPDIF_RX_LOCK_START interrupt in the DAI_IRPTL_H/L
register. This triggers the DAI_INTH/L interrupt once the receiver is locked.
From this point on, the S/PDIF starts producing extracted output serial
data. The data is guaranteed to be correct only after the
LOCK goes high.
Status Bits
After the receiver is locked, the other status bits in the receiver status
(DIRSTAT) and the channel status (DIRCHANL/R) registers can be read. Inter-
rupts can also be used with some status bits.
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