Booting
14-46 ADSP-21368 SHARC Processor Hardware Reference
8-Bit SPI Host Boot
Figure 14-15 shows 8-bit SPI host packing of 48-bit instructions executed
at PM addresses 0x90000 and 0x90001. For 8-bit hosts, four 8-bit words
pack into the shift register to generate a 32-bit word. The 32-bit word
shifts to internal program memory during the load of the 256-instruction
word kernel.
The following example shows a 48-bit instructions executed.
[0x90000] 0x112233445566
[0x90001] 0x7788AABBCCDD
The 8-bit SPI host packs or prearranges the data as:
Figure 14-15. 8-Bit SPI Host Packing
SPI word 1 = 0x66
SPI word 2 = 0x55
SPI word 3 = 0x44
SPI word 4 = 0x33
SPI word 5 = 0x22
SPI word 6 = 0x11
SPI word 7 = 0xDD
SPI word 8 = 0xCC
MOSI
8-bit
Word N
RXSPI
DMA
Internal
Memory
32 32
32
0x90000
0x900FF
8-bit
Word N
(Loader Kernel)
8-bit
Word N
8-bit
Word N