PWM Implementation
8-6 ADSP-21368 SHARC Processor Hardware Reference
The largest value that can be written to the 16-bit
PWMPERIODx register is
0xFFFF = 65,535 which corresponds to a minimum PWM switching fre-
quency of:
Also note that PWMPERIOD values of 0 and 1 are not defined and should not
be used when the PWM outputs or PWM sync is enabled.
Dead Time
The second important parameter that must be set up in the initial config-
uration of the PWM block is the switching dead time. This is a short delay
time introduced between turning off one PWM signal (say AH) and turn-
ing on the complementary signal, (AL). This short time delay is introduced
to permit the power switch to turn off (AH in this case) to completely
recover its blocking capability before the complementary switch is turned
on. This time delay prevents a potentially destructive short-circuit condi-
tion from developing across the dc link capacitor of a typical voltage
source inverter.
The 10-bit, read/write PWMDT3–0 registers control the dead time. The dead
time, T
d
, is related to the value in the PWMDTx registers by:
Therefore, a PWMDT value of 0x00A (= 10), introduces a 200 ns delay
between when the PWM signal (for example AH) is turned off and its com-
plementary signal (
AL) is turned on. The amount of dead time can
therefore be programmed in increments of 2 t
PCLK
(or 20 ns for a 100
MHz peripheral clock). The PWMDTx registers are 10-bit registers, and the
f
PWM()min,
100 10
6
×
2 65535×
------------------------
763Hz==
T
d
PWMDT 2× t
PCLK
×=
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