ADSP-21368 SHARC Processor Hardware Reference 8-5
Pulse Width Modulation
registers of that group. The period completion status bits in the
PWM_GSTAT
register are set independently of the corresponding PWM_IRQEN bit, but
interrupt generation depends on the PWM_IRQEN bit.
Switching Frequencies
The 16-bit read/write PWM period registers, (PWMPERIOD3–0), control the
PWM switching frequency. The fundamental timing unit of the PWM
controller is t
PCLK
. Therefore, for a 100 MHz peripheral clock (PCLK), the
fundamental peripheral clock increment, PCLK, is 10 ns. The value written
to the PWMPERIODx register is effectively the number of t
PCLK
clock incre-
ments in half a PWM period. The required PWMPERIODx value as a function
of the desired PWM switching frequency (f
PWM
) is given by:
Therefore, the PWM switching period, T
s
, can be written as:
For example, for a 100 MHz f
PCLK
and a desired PWM switching fre-
quency of 10 kHz (T
s
= 100 ms), the correct value to load into the
PWMPERIODx register is:
PWMPERIOD
f
PCLK
2 f
PWM
×
----------------------
=
T
s
2 PWMTM
2
PCLK
××=
PWMPERIOD
100 10
6
×
210× 10
3
×
------------------------------
5000==
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