Analog Devices SHARC ADSP-21368 User Manual

Clock Derivation
14-28 ADSP-21368 SHARC Processor Hardware Reference
Another part, the ADM706TAR, provides power on
RESET and optional
manual RESET. It allows designers to create a more complete supervisory
circuit that monitors the supply voltage. Monitoring the supply voltage
allows the system to initiate an orderly shutdown in the event of power
failure. The ADM706TAR also allows designers to create a watchdog
timer that monitors for software failure. This part is available in an 8-lead
SOIC package. Figure 14-7 shows a typical application circuit using the
ADM706TAR.
Timing Specifications
The ADSP-21367/8/9 and ADSP-2137x processor’s internal clock (a mul-
tiple of
CLKIN) provides the clock signal for timing internal memory,
processor core, serial ports, and SPI (as required for read/write strobes).
During reset, program the ratio between the processor’s internal clock fre-
quency and external (CLKIN) clock frequency with the CLK_CFG1–0 pins.
Figure 14-6. Simple Reset Generator
V
CC
RESET
GND
ADM809-RART
V
DDEXT
RESET
GND
+3.3V
DDEXT
10µF
V
DDINT
+1.2V
DDINT
a
ADSP-213xx
S

Analog Devices SHARC ADSP-21368 Specifications

General

Brand	Analog Devices
Model	SHARC ADSP-21368
Category	Computer Hardware
Language	English