Programming Notes
6-38 ADSP-21368 SHARC Processor Hardware Reference
Programming Notes
The following sections provide information to help the programmer use
the SPI in an ADSP-21367/8/9 and ADSP-2137x processor system.
Routing SPI Signals Using The DPI
All signals of both SPI ports are routed to the DPI pins using the SRU2.
Special considerations must be made when routing the signals, especially
with regards to using the correct pin enables that work with the SPI mode
being used. In addition, open drain mode also has special requirements for
DPI routing. See “Configuring the SPI” on page 4-72 for more
information.
Programming Examples
The following three programming examples are for the ADSP-21369 pro-
cessor. The example shown in Listing 6-1 transmits a buffer of data from
the SPI port in master mode using DMA. In this example, the I/O proces-
sor (IOP) automatically moves data from internal memory to the SPI’s
four-deep DMA FIFO.
The second example, shown in Listing 6-2 on page 6-41, also transmits a
buffer, but the transfer is core-driven using interrupts. In this example,
only the SPI’s one-deep transmit buffer (
TXSPI) is serviced by the core and
the four-deep DMA FIFO is not used. The core supplies the SPI port with
data in a short loop which causes the core to hang at each write to the
transmit buffer until the SPI is ready for new data.
The third example, shown in Listing 6-3 on page 6-43, receives multiple
buffers using DMA chaining. DMA chaining on the ADSP-21367/8/9
processor’s SPI is initialized differently than on other SHARC processors,
as described in Chapter 2, I/O Processor.
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