ADSP-21368 SHARC Processor Hardware Reference 4-31
Digital Audio/Digital Peripheral Interfaces
Group C Connections—Frame Sync Signals
Group C connections are used to route signals to frame sync inputs. These
are the SPORT frame sync inputs (when the SPORT is in slave mode) and
the frame sync inputs to the eight IDP channels. The SRCs and SPDIF
transmitter and receiver are also selected from the list of group C sources
and set in the group C registers.
Each of the frame sync inputs specified is connected to a frame sync
source based on the 5-bit values described in the group C frame sync
sources. Thirty-two possible frame sync sources can be connected using
the
SRU_FS0-4 registers. The registers are shown in Figure 4-25 through
Figure 4-29. The input and output signals for group C are summarized in
Table 4-6 on page 4-35.
L
The following notes apply to group C connections.
1. SRU_FS0, SRU_FS1, and SRU_FS2 are 30-bit registers. On
reads, bits 30 and 31 always return zero.
2.
SRU_FS3 is a 24-bit register. On reads, bits 31 through 24
always return zero.
3.
SRU_FS4 is a 10-bit register. On reads, bits 31 through 10
always return zero.
110000 (0x30) DIT_O Select SPDIF biphase encoded output
110001 (0x31) –111101 (0x3D) Reserved
111110 (0x3E) LOW Select logic level low (0)
111111 (0x3F) HIGH Select logic level high (1)
Table 4-5. Group B Sources—Serial Data (Cont’d)
Selection Code Source Signal Description (Source)
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