EasyManua.ls Logo

Analog Devices SHARC ADSP-21368

Analog Devices SHARC ADSP-21368
894 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Theory of Operation
10-4 ADSP-21368 SHARC Processor Hardware Reference
Conceptual Model
In SRC theory, interpolation of the input data by a factor of 2
20
involves
placing (2
20
– 1) samples between each f
S_IN
sample. Figure 10-2 and
Figure 10-3 on page 10-6 shows both the time domain and the frequency
domain of interpolation by a factor of 2
20
. Conceptually, interpolation by
2
20
involves the steps of zero-stuffing (2
20
– 1) samples between each
f
S_IN
sample and convolving this interpolated signal with a digital
low-pass filter to suppress the images. In the time domain, it can be seen
that f
S_OUT
selects the closest f
S_IN
× 2
20
sample from the zero-order hold
as opposed to the nearest f
S_IN
sample in the case of no interpolation.
This significantly reduces the resampling error.
Figure 10-1. Zero-Order Hold Used by f
S_OUT
to Resample Data
From f
S_IN
ZERO-ORDER
HOLD
IN OUT
f
S_IN
=1/T1
f
S_OUT
=1/T2
ORIGINAL SIGNAL
SAMPLED AT f
S_IN
SIN(X)/X OF ZERO-ORDER HOLD
SPECTRUM OF ZERO-ORDER HOLD OUTPUT
SPECTRUM O F f
S_OUT
SAMPLING
f
S_OUT
2 × f
S_OUT
FREQUENCY RESPO NSE O F f
S_OUT
CONVO LVED WITH ZERO-ORDER
HOLD SP ECTRUM

Table of Contents

Related product manuals