Processor Pin Descriptions
14-2 ADSP-21368 SHARC Processor Hardware Reference
L
Before proceeding with this chapter it is recommended that you
become familiar with the ADSP-21367/8/9 and ADSP-2137x pro-
cessor’s core architecture. This information is presented in the
ADSP-2136x SHARC Processor Programming Reference.
Processor Pin Descriptions
Refer to the processor-specific data sheet for pin information, including
package pinouts for the currently available package options.
Pin Multiplexing
The ADSP-21367/8/9 and ADSP-2137x processors provide the same
functionality as other SHARC processors but with a much lower pin
count (reducing system cost). Pin multiplexing is used in the following
ways.
• Reset output/local clock output/running reset input (ADSP-2137x
processors only)
For more information, see “RESETOUT/CLKOUT/RUNRSTIN”
on page 14-12.
• External memory interface data (input/output)
For more information, see “Choosing EP Data Mode” on
page 14-6.
• PDAP (input only)
• FLAGS (input/output)
For more information, see “Core-Based Flag Pins” on page 14-8.
• PWM channels (output, not available on all models)
See Table 1-1 on page 1-5.
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