ADSP-21368 SHARC Processor Hardware Reference 6-7
Serial Peripheral Interface Ports
Master Out Slave In (MOSI)
The MOSI pin is one of the bidirectional I/O data pins. If the
ADSP-21367/8/9 and ADSP-2137x processors are configured as masters,
the MOSI pin becomes a data transmit (output) pin. If the processors are
configured as slaves, the MOSI pin becomes a data receive (input) pin. In an
SPI interconnection, the data is shifted out from the MOSI output pin of
the master and shifted into the MOSI input of the slave.
Master In Slave Out (MISO)
The MISO pin is one of the bidirectional I/O data pins. If the processor is
configured as a master, the MISO pin becomes a data receive (input) pin. If
the processor is configured as a slave, the MISO pin becomes a data transmit
(output) pin. In an SPI interconnection, the data is shifted out from the
MISO output pin of the slave and shifted into the MISO input pin of the
master.
Figure 6-4 illustrates how the processor can be used as the slave SPI
device. The 8-bit host microcontroller is the SPI master. The processor
can be booted through its SPI interface to allow application code and data
to be downloaded prior to runtime. When a system is comprised of multi-
ple slaves, only one slave is allowed to transmit data back to the master at
any given time.
Figure 6-4 also shows an example SPI interface where a processor is the
SPI master. When it uses the SPI interface, the processor can be directed
to alter the conversion resources, mute the sound, modify the volume, and
power down the AD1855 stereo DAC by accessing the control register of
the DAC serially.
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