ADSP-21368 SHARC Processor Hardware Reference A-83
Register Reference
PWM Polarity Select Registers (PWMPOLx)
These registers, described in Table A-29, control the polarity of the four
PWM groups which can be set to either active hi or active lo. The
addresses for these registers are:
PWMPOL0 — 0x300F
PWMPOL1 — 0x301F
PWMPOL2 — 0x340F
PWMPOL3 — 0x341F
Table A-29. PWMPOLx Register Bit Descriptions
Bit Name Description
0 PWM_POL1AL Write to Set Channel A Low Polarity 1
1 PWM_POL0AL Write to Set Channel A Low Polarity 0
2 PWM_POL1AH Write to Set Channel A High Polarity 1
3 PWM_POL0AH Write to Set Channel A High Polarity 0
4 PWM_POL1BL Write to Set Channel B Low Polarity 1
5 PWM_POL0BL Write to Set Channel B Low Polarity 0
6 PWM_POL1BH Write to set channel B High Polarity 1
7 PWM_POL0BH Write to set channel B High Polarity 0
To Next Page
Loading...
