ADSP-21368 SHARC Processor Hardware Reference A-29
Register Reference
Serial Port Registers
The following section describes serial port (SPORT) registers.
SPORT Serial Control Registers (SPCTLx)
The SPORT serial control registers’ addresses are:
The reset value for these registers is 0x0000 0000. The SPCTLx registers are
transmit and receive control registers for the corresponding serial ports
(SPORT 0 through 7). The following figures show the bit descriptions
and settings for the SPORT operating modes.
• Figure A-13 and Figure A-14 provide bit definitions for standard
DSP serial mode.
• Figure A-15 provides bit definitions in left-justified sample-pair
and I
2
S mode.
• Figure A-16, Figure A-17 and Figure A-18 provide bit definitions
for packed I
2
S and multichannel mode.
L
When changing SPORT operating modes, programs should clear
the serial port’s control register before writing the new settings to
the control register. See Table A-7 for a complete description of
SPORT operation modes and Table A-8 for complete bit
descriptions.
SPCTL0 – 0xC00 SPCTL1 – 0xC01
SPCTL2 – 0x400 SPCTL3 – 0x401
SPCTL4 – 0x800 SPCTL5 – 0x801
SPCTL6 – 0x4800 SPCTL7 – 0x4801
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