Programming the SRC Module
10-22 ADSP-21368 SHARC Processor Hardware Reference
Programming the SRC Module
Use the following guidelines when developing programs that include the
SRC module.
SRC Control Register Programming
Initially, programs configure the SRC control registers SRCCTL0 and
SRCCTL1. The SRCCTL0 register contains control parameters for the SRC0
and SRC1 modules and the SRCCTL1 register contains control values for
the SRC2 and SRC3 modules. The control parameters include mute
information, data formats for input and output ports, de-emphasis enable,
dither enable, and matched-phase mode enable for multiple SRCs. Write
the settings to the desired control register at least one cycle before setting
the corresponding SRC module enable bit, SRCx_ENABLE.
SRU Programming
The SRU (signal routing unit) needs to be programmed in order to con-
nect the SRCs to the output pins or any other peripherals.
For normal operation, the data, clock, and frame sync signals need to be
routed as shown in Table 10-4.
Table 10-4. SRC Signal Routing
Signal Definition
SRCx_DAT_IP_I SRC module data input
SRCx_CLK_IP_I SRC module clock input
SRCx_FS_IP_I SRC module frame sync input
SRCx_DAT_OP_I SRC module data output
SRCx_CLK_OP_I SRC module clock output
SRCx_FS_OP_O SRC module frame sync output
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