ADSP-21368 SHARC Processor Hardware Reference 6-21
Serial Peripheral Interface Ports
transmit port operates according to the state of the
SENDZ bit
in the SPICTLx registers.
If SENDZ = 1 and the DMA buffer is empty, the device
repeatedly transmits zeros on the MISO pin. If SENDZ = 0 and
the DMA buffer is empty, it repeatedly transmits the last
word it transmitted before the DMA buffer became empty.
All aspects of SPI receive operation should be ignored. The
data in the RXSPIx registers is not intended to be used, and
the RXS and ROVF bits should be ignored. The ROVF overrun
condition cannot generate an error interrupt in this
situation.
L
While a DMA transfer is occurring on one channel (TX or RX), the
core (based on the RXS and TXS status bits) can transfer data in the
other direction.
Changing SPI Configuration
Programs should take the following precautions when changing SPI
configurations.
• The SPI configuration must not be changed during a data transfer.
• Change the clock polarity only when no slaves are selected.
• Change the SPI configuration only when SPIEN = 0. For example, if
operating as a master in a multislave system, and there are slaves
that require different data or clock formats, then the master SPI
should be disabled, reconfigured, and then re-enabled.
However, when an SPI communication link consists of 1) a single
master and a single slave, 2)
CPHASE = 1, and 3) the slave’s slave
select input is tied low, then the program can change the SPI
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