ADSP-21368 SHARC Processor Hardware Reference 10-1
10 ASYNCHRONOUS SAMPLE
RATE CONVERTER
Sample rate conversion is the process of converting a digital signal from
one sampling rate to another, while modifying the information that is car-
ried by the signal as little as possible.
Sample rate conversion is useful because different systems use different
sampling rates for a variety reasons. Because the physics of sampling
require a minimum sampling rate, other factors determine the actual rates
used. For example, different audio systems can use rates of 44.1, 48, and
96 kHz and programs need to transfer source material between these sys-
tems. Just replaying the existing data at the new rate does not work — it
introduces large changes in pitch (for audio) and movement as well (for
video), plus it cannot be done in real time.
The asynchronous sample rate converter (SRC), as it is implemented in
the ADSP-21367/8/9 and ADSP-2137x processors, is used to perform
asynchronous sample rate conversion across independent stereo channels
without using any internal processor resources. Furthermore, the SRC
blocks can be configured to operate together to convert multichannel
audio data without phase mismatches. Finally, the SRC is used to clean up
audio data from jittery clock sources such as the S/PDIF receiver.
The SRC contains four blocks (SRC0–3). It also is the same core that is
used in the Analog Devices AD1896 192 kHz Stereo Asynchronous Sam-
ple Rate Converter. The top-level block diagram of the SRC module is
shown in Figure 10-4 on page 10-9.
The SRC has a 3-wire interface for the serial input and output ports that
supports left-justified, I
2
S, and right-justified (16-, 18-, 20-, 24-bit)
modes. Additionally, the serial interfaces support time-division
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