ADSP-21368 SHARC Processor Hardware Reference A-179
Register Reference
Enhanced Emulation Status Register
The EEMUSTAT register reports the breakpoint status of the programs that
run on the ADSP-21367/8/9 and ADSP-2137x processors. This register is
a memory-mapped IOP register that can be accessed by the core. The
EEMUSTAT register contains two status bits that report I/O breakpoints, one
each for the two I/O buses (IOX and IOY).
When a breakpoint is reached, an interrupt occurs and the breakpoint’s
status bits are set. When the core returns from an interrupt, the break-
point’s status bits are cleared. This register is shown in Figure A-86 and
described in Table A-72.
25 UMODE User Mode Breakpoint Functionality Enable. Address Break-
point 3.
0 = Disable user controlled breakpoint
1 = Enable user controlled breakpoint
26 ENBIOY IOY Breakpoint Enable.
0 = Disable IOY breakpoint
1 = Enable IOY breakpoint 0
27 ENBIOX IOX Breakpoint Enable.
0 = Disable IOX breakpoint
1 = Enable IOX breakpoint
31–28 Reserved
Table A-71. BRKCTL Register Bit Descriptions (Cont’d)
Bit Name Description
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