ADSP-21368 SHARC Processor Hardware Reference 5-3
Serial Ports
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New DMA channels are added for SPORT6 and 7. These new
SPORTs also have their own interrupt lines.
Operation Modes
Thee serial ports have four operation modes: standard DSP serial, left-jus-
tified sample pair, I
2
S, and multichannel. In standard DSP serial,
left-justified sample pair and I
2
S modes, when both A and B channels are
used, they transmit or receive data simultaneously, sending or receiving bit
0 on the same edge of the serial clock, bit 1 on the next edge of the serial
clock, and so on. In multichannel mode, SPORTs can receive and trans-
mit A and B channel data selectively from up to 128 channels of a TDM
serial bit stream. See “SPORT Operation Modes” on page 5-10.
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For the ADSP-21367/8/9 and ADSP-2137x processors in multi-
channel mode, there are several enhancements from previous
SHARC processors.
• In previous SHARC processors, SPORTs were forced into pairs
when in multichannel mode. The SPORTs in the
ADSP-21367/8/9 and ADSP-2137x processors now operate
independently.
• In addition, control registers are added to each SPORT. In previ-
ous versions, there was only one TDM control register for each
SPORT pair.
• New data valid pins are added to each SPORT. In previous ver-
sions, in paired mode, the frame sync of one of the SPORTs was
used as a data valid pin so eight new pin definitions are added to
the SRU.
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