ADSP-21368 SHARC Processor Hardware Reference 6-19
Serial Peripheral Interface Ports
Slave Mode DMA Operation
A slave mode DMA transfer occurs when the SPI port is enabled and con-
figured in slave mode, and DMA is enabled. When the
SPIDS signal
transitions to the low state or when the first active edge of SPICLK is
detected, it triggers the start of a transfer.
To configure for slave mode DMA:
1. Write to the SPICTLx registers to make the mode of the serial link
the same as the mode that is set up in the SPI master. Configure
the TIMOD field to select transmit or receive DMA mode
(TIMOD = 10).
2. Define DMA receive (or transmit) transfer parameters by writing
to the IISPIx, IMSPIx, and CSPIx registers. For DMA chaining,
write the chain pointer address to the CPSPIx registers.
3. Write to the SPIDMACx registers to enable the SPI DMA engine and
configure the following:
• A receive access (SPIRCV = 1) or
• A transmit access (SPIRCV = 0)
If DMA chaining is desired, set the SPICHEN bit in the
SPIDMACx registers.
L
Enable the SPI port before enabling DMA to avoid data
corruption.
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