ADSP-21368 SHARC Processor Hardware Reference 10-21
Asynchronous Sample Rate Converter
SRC Registers
The SRC uses five 32-bit registers to configure and operate the SRC
module.
• SRCCTL0, SRC control 0. This read/write register is used to con-
trol the operating modes, filters, and data formats used in the
SRC0 and SRC1 modules. This register is located at address
0x2490.
• SRCCTL1, SRC control 1. This read/write register is used to con-
trol the operating modes, filters, and data formats used in the
SRC2 and SRC3 modules. This register is located at address
0x2491.
• SRCMUTE, SRC mute. This read/write register performs mute-
out to mute-in control and provides status information for the
SRC3–0 modules. This register is located at address 0x2492.
• SRCRAT0, SRC output to input ratio 0. This read-only register
reports the mute and I/O sample ratio for SRC0 and SRC1. This
register is located at address 0x2498.
• SRCRAT1, SRC output to input ratio 1. This read-only register
reports the mute and I/O sample ratio for SRC2 and SRC3. This
register is located at address 0x2499.
For complete register bit descriptions, see “SRC Control Registers (SRC-
CTLx)” on page A-97.
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