ADSP-21368 SHARC Processor Hardware Reference 3-19
External Port
External Memory Interface Pins
The pins used by the external memory interface are described in
Table 3-8.
Table 3-8. External Memory Pin Descriptions
Pin Name I/O Description for AMI Description for SDRAM
DATA31–0 I/O Data bus Data bus
ADDR23–0 O Address bus Address bus, includes bank selects
ADDR [23:0]
SDCLK O N/A SDRAM clock
SDCKE O N/A SDRAM clock enable
SDA10 O N/A SDRAM address bit 10 used for auto
refresh
SDRAS
O N/A SDRAM row address strobe
SDCAS O N/A SDRAM column address strobe
SDWE O N/A SDRAM write enable
MS3–0 O Chip select Chip select. MS1-0, FLAG2 and
FLAG3 are muxed to form MS3-2,
(FLAG3 is MS3 and FLAG2 is MS2
RD O Read output strobe N/A
WR
O Write output strobe N/A
ACK I Acknowledge signal N/A
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