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ADSP-21368 SHARC Processor Hardware Reference A-73

IDP Ping-Pong Count Registers (IDP_DMA_PCx)

Table A-23 provides information about the IDP ping-pong DMA count

registers.

IDP_DMA_I7A 0x240F 0x00000 IDP channel 7 index A ping-pong DMA register

IDP_DMA_I0B 0x2418 0x00000 IDP channel 0 index B ping-pong DMA register

IDP_DMA_I1B 0x2419 0x00000 IDP channel 1 index B ping-pong DMA register

IDP_DMA_I2B 0x241A 0x00000 IDP channel 2 index B ping-pong DMA register

IDP_DMA_I3B 0x241B 0x00000 IDP channel 3 index B ping-pong DMA register

IDP_DMA_I4B 0x241C 0x00000 IDP channel 4 index B ping-pong DMA register

IDP_DMA_I5B 0x241D 0x00000 IDP channel 5 index B ping-pong DMA register

IDP_DMA_I6B 0x241E 0x00000 IDP channel 6 index B ping-pong DMA register

IDP_DMA_I7B 0x241F 0x00000 IDP channel 7 index B ping-pong DMA register

Table A-23. IDP_DMA_PCx Registers

IDP_DMA_PC0 0x2428 0x00000 IDP DMA channel 0 ping-pong count

IDP_DMA_PC1 0x2429 0x00000 IDP DMA channel 1 ping-pong count

IDP_DMA_PC2 0x242A 0x00000 IDP DMA channel 2 ping-pong count

IDP_DMA_PC3 0x242B 0x00000 IDP DMA channel 3 ping-pong count

IDP_DMA_PC4 0x242C 0x00000 IDP DMA channel 4 ping-pong count

IDP_DMA_PC5 0x242D 0x00000 IDP DMA channel 5 ping-pong count

IDP_DMA_PC6 0x242E 0x00000 IDP DMA channel 6 ping-pong count

IDP_DMA_PC7 0x242F 0x00000 IDP DMA channel 7 ping-pong count

Table A-22. IDP_DMA_IxA Registers (Cont’d)

Analog Devices SHARC ADSP-21368 User Manual

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