Analog Devices SHARC ADSP-21368 User Manual

Booting
14-44 ADSP-21368 SHARC Processor Hardware Reference
The following example shows a 48-bit instructions executed.
[0x90000] 0x112233445566
[0x90001] 0x7788AABBCCDD
The 32-bit SPI host packs or prearranges the data as:
16-Bit SPI Host Boot
Figure 14-14 shows how a 16-bit SPI host packs 48-bit instructions at PM
addresses 0x90000 and 0x90001. For 16-bit hosts, two 16-bit words are
packed into the shift register to generate a 32-bit word. The 32-bit word
shifts to internal program memory during the kernel load.
Figure 14-13. 32-Bit SPI Host Packing
SPI word 1 = 0x33445566
SPI word 2 = 0xCCDD1122
SPI word 3 = 0x7788AABB
MOSI
32-bit
Word N
RXSPI
DMA
Internal
Memory
32 32
32
0x90000
0x900FF

Analog Devices SHARC ADSP-21368 Specifications

General

Architecture	SHARC
Core Processor	ADSP-21368
Core Clock Speed	400 MHz
Serial Ports	1
SPORTs	4
SPI Ports	1
I2C Ports	1
Timers	2
DMA Channels	14
Operating Voltage - Core	1.2 V
Operating Voltage - I/O	3.3 V
Data Bus Width	32-bit
Operating Temperature	-40°C to +85°C
Number of Cores	1
Audio Processing	Yes
Package	LQFP