Booting
14-44 ADSP-21368 SHARC Processor Hardware Reference
The following example shows a 48-bit instructions executed.
[0x90000] 0x112233445566
[0x90001] 0x7788AABBCCDD
The 32-bit SPI host packs or prearranges the data as:
16-Bit SPI Host Boot
Figure 14-14 shows how a 16-bit SPI host packs 48-bit instructions at PM
addresses 0x90000 and 0x90001. For 16-bit hosts, two 16-bit words are
packed into the shift register to generate a 32-bit word. The 32-bit word
shifts to internal program memory during the kernel load.
Figure 14-13. 32-Bit SPI Host Packing
SPI word 1 = 0x33445566
SPI word 2 = 0xCCDD1122
SPI word 3 = 0x7788AABB
MOSI
32-bit
Word N
RXSPI
DMA
Internal
Memory
32 32
32
0x90000
0x900FF
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