Sony/Philips Digital Interface Registers
A-86 ADSP-21368 SHARC Processor Hardware Reference
Sony/Philips Digital Interface Registers
The following sections describe the registers that are used to configure,
enable and report status information for the S/PDIF transceiver.
Transmitter Control Register (DITCTL)
The S/PDIF transmit control register (DITCTL) is a 32-bit, read/write reg-
ister located at address 0x24A0. The register’s bits are shown in
Figure A-32, Figure A-33 and described in Table A-33.
Figure A-32. DITCTL Register (Bits 31–16)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0000000000000000
DIT_B0CHANR
Channel Status Byte 0 For Subframe B
DITCTL (0x24A0)
DIT_B0CHANL
Channel Status Byte 0 for Subframe A
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