ADSP-21368 SHARC Processor Hardware Reference 4-15
Digital Audio/Digital Peripheral Interfaces
page A-29. SRU1 then becomes transparent to the peripheral. Figure 4-10
demonstrates SPORT0 properly routed to DAI pins one through four—
although it can be equally well routed to any of the 20 DAI pins.
Though SPORT signals are capable of operating in this bidirectional man-
ner, it is not required that they be connected to the pin buffer this way. As
mentioned above, if the system design only uses a SPORT signal in one
direction, it is easier and safer to connect the pin buffer enable directly
high or low as appropriate. Furthermore, signals in the SRUs other than
the pin buffer enable signal (which is generated by the peripheral) may be
routed to the pin buffer enable input. For example, an outside source may
be used to ‘gate’ a pin buffer output by controlling the corresponding pin
buffer enable.
Making Connections in the SRUs
As described previously, the SRUs are similar to a set of patch bays. Each
bay routes a distinct set of outputs to compatible inputs. These connec-
tions are implemented as a set of memory-mapped registers with a bit field
for each input. The outputs are implemented as a set of bit encodings.
Conceptually, a patch cord is used to connect an output to an input. In
the SRUs, a bit pattern that is associated with a signal output (shown as
item 1 in Figure 4-11) is written to a bit field corresponding to a signal
input (shown as item 2 in Figure 4-11).
The memory-mapped SRU registers are arranged by groups, referred to as
group A through group F in SRU1 and group A through group C in
SRU2 and described in “DAI/SRU1 Connection Groups” on page 4-18
and “DPI/SRU2 Connection Groups” on page 4-51. Each group has a
unique encoding for its associated output signals and a set of configura-
tion registers. For example, in the DAI, group A is used to route clock
signals. Five memory-mapped registers,
SRU_CLK4–0, contain 5-bit wide
fields corresponding to the clock inputs of various peripherals. The values
written to these bit fields specify a signal source that is an output from
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