ADSP-21368 SHARC Processor Hardware Reference 3-31
External Port
• SDC uses open page policy—any open page is closed only if a new
access in another page of the same bank occurs
• Supports multibank operation within the SDRAM
(ADSP-2137x only)
• Uses a programmable refresh counter to coordinate between vary-
ing clock frequencies and the SDRAM’s required refresh rate
• Provides multiple timing options to support additional buffers
between the processor and SDRAM
• Allows independent auto-refresh while the asynchronous memory
interface (AMI) has control of the External Port
• Supports self-refresh mode for power savings
• Supports instruction fetch (ADSP-2137x only)
• Supports 32-bit data access by the processor core
L
All inputs are sampled and all outputs are valid on the rising edge
of the SDRAM clock output (SDCLK).
Definition of Terms
The following are terms commonly used in SDRAM systems.
Bank activate command
The bank activate command causes the SDRAM to open an internal bank
of memory (specified by the bank address) in a specific row (specified by
the row address). For more information, see “SDC Commands” on
page 3-63.
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