Setting Up DMA Parameter Registers
2-24 ADSP-21368 SHARC Processor Hardware Reference
Setting Up DMA Parameter Registers
Once you have determined and configured the DMA options, you can
configure the DMA parameter registers. The parameter registers control
the source and destination of the data, the size of the data buffer, and the
step size used. These topics are described in detail in the following
sections.
DMA Transfer Direction
DMA transfers between internal memory and external memory devices use
the processor’s external port. For these types of transfers, a program pro-
vides the DMA controller with the internal memory buffer size, address,
and address modifier, as well as the external memory buffer size, address
and address modifier and the direction of transfer. After setup, the DMA
transfers begin when the program enables the channel and continues until
the I/O processor transfers the entire buffer to processor memory.
Table 2-6 on page 2-29 shows the parameter registers for each DMA
channel.
Similarly, DMA transfers between internal memory and serial, IDP or SPI
ports have DMA parameters. When the I/O processor performs DMA
between internal memory and one of these ports, the program sets up the
parameters, and the I/O uses the port instead of the external bus.
Additionally, the ADSP-21367/8/9 and ADSP-2137x processors can use
DMA to transfer 64-bit blocks of data between internal memory locations.
The direction (receive or transmit) of the peripheral determines the direc-
tion of data transfer. When the port receives data, the I/O processor
automatically transfers the data to internal memory. When the port needs
to transmit a word, the I/O processor automatically fetches the data from
internal memory. Figure 2-2 shows the processor’s I/O processor, related
ports, and buses. Figure 2-3 on page 2-30 shows more detail on DMA
channel data paths.
To Next Page
Loading...
Need help?
General
