ADSP-21368 SHARC Processor Hardware Reference 4-51
Digital Audio/Digital Peripheral Interfaces
DPI/SRU2 Connection Groups
The DPI/SRU2 has the following default configurations where seven bits
are for SPI1 booting, two bits are for UART1, two bits are for the TWI,
and the remaining three bits are for the timers.
100101 (0x25) SPORT7_FS_PBEN_O Select serial port 7 frame sync output enable
100110 (0x26) SPORT7_DA_PBEN_O Select serial port 7 data channel A output enable
100111 (0x27) SPORT7_DB_PBEN_O Select serial port 7 data channel B output enable
101000 (0x28) SPORT0_TDV_PBEN_O Select serial port 0 transmit data valid output
101001 (0x29) SPORT1_TDV_PBEN_O Select serial port 1 transmit data valid output
101010 (0x2A) SPORT2_TDV_PBEN_O Select serial port 2 transmit data valid output
101011 (0x2B) SPORT3_TDV_PBEN_O Select serial port 3 transmit data valid output
101100 (0x2C) SPORT4_TDV_PBEN_O Select serial port 4 transmit data valid output
101101 (0x2D) SPORT5_TDV_PBEN_O Select serial port 5 transmit data valid output
100111 (0x2E) SPORT6_TDV_PBEN_O Select serial port 6 transmit data valid output
101110 (0x2F) SPORT7_TDV_PBEN_O Select serial port 7 transmit data valid output
110000 (0x30)–1111111 (0x3F) Reserved
Table 4-10. DPI/SRU2 Default Configuration
Pin Number Signal Pin Number Signal
DPI_01 SPIMOSI DPI_08 SPIFLG3
DPI_02 SPIMISO DPI_09 UART0_TX
DPI_03 SPICLK DPI_10 UART0_RX
DPI_04 SPIDS DPI_11 TWI_SDATA
DPI_05 SPIFLG0 DPI_12 TWI_SCLK
Table 4-9. Group F Sources—Pin Output Enable (Cont’d)
Selection Code Source Signal Description (Output Source)
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