ADSP-21368 SHARC Processor Hardware Reference 12-15
Two Wire Interface Controller
Programming Examples
The following sections include programming examples for general setup,
slave mode, and master mode, as well as guidance for repeated start condi-
tions. For an example of programming the TWI using the digital
peripheral interface and SRU2, see “Configuring the Two Wire Interface”
on page 4-73.
General Setup
General setup refers to register writes that are required for both slave
mode and master mode operation. General setup should be performed
before either the master or slave enable bits are set.
Programs should enable the TWI controller through the TWIMITR register
and set the prescale value. Program the prescale value to the binary repre-
sentation of f
PCLK
/10 MHz.
All values should be rounded up to the next whole number. The TWIEN
enable bit must be set. Note that once the TWI controller is enabled, a
bus busy condition may be detected.
Slave Mode
When enabled, slave mode supports both receive and transmit data trans-
fers. It is not possible to enable only one data transfer direction and not
acknowledge (NAK) the other. This is reflected in the following setup.
1. Program the
TWISADDR register. The appropriate 7 bits are used in
determining a match during the address phase of the transfer in
case of 7-bit addressing.
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