AES3/SPDIF Stream Format
9-2 ADSP-21368 SHARC Processor Hardware Reference
• In regards to handling channel status information, the SPDIF
transmitter can operate in standalone and full serial modes. In stan-
dalone mode, channel status bits, user bits, and validity bits are
taken from the corresponding buffers or control register. In full
serial mode, all these bits are transferred with data bits from the
SDATA pin. This allows programs to have control over the status
fields and the ability to pass on status information which may have
been supplied from an encoder, for instance.
AES3/SPDIF Stream Format
The data carried by the SPDIF interface is transmitted serially. In order to
identify the assorted bits of information the data stream is divided into
frames, each of which are 64 time slots (or 128 unit intervals
1
) in length
(Figure 9-1). Since the time slots correspond with the data bits, the frame
is often described as being 64 bits in length.
1
The unit interval is the minimum time interval between condition changes of a data transmission sig-
nal.
Figure 9-1. S/PDIF Block Structure
CHANNEL
1
X Y
CHANNEL
2
ZY
CHANNEL
1
CHANNEL
2
CHANNEL
1
CHANNEL
2
X
Y
START OF
BLOCK
FRAME 0
FRAME 191 FRAME 1
SUBFRAME
1
SUBFRAME
2
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