Serial Peripheral Interface Registers
A-52 ADSP-21368 SHARC Processor Hardware Reference
Serial Peripheral Interface Registers
The following sections describe the registers associated with the two serial
peripheral interfaces (SPIs). The SPI B port is routed through the DAI.
SPI Control Registers (SPICTL, SPICTLB)
The addresses of these registers are 0x1000 and 0x2800 (SPICTLB). The
reset value for these registers is 0x0400. The SPI control (SPICTL) regis-
ters, shown in Figure A-23 and described in Table A-10, are used to
configure and enable the SPI system.
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