Analog Devices SHARC ADSP-21368 User Manual

External Port Registers
A-10 ADSP-21368 SHARC Processor Hardware Reference
External Port Registers
The following registers are used to control asynchronous memory inter-
face (AMI), the SDRAM controller (SDC), and the shared memory
interface (ADSP-21368 only).
External Port Control Register (EPCTL)
The external port control register can be programmed to arbitrate the
accesses between the processor core and DMA, and between different
DMA channels. These registers are shown in Figure A-4 and described in
Table A-3.
7 Reserved (reset value =0)
10–8 IDC ID Code. These bits indicate the state of the ID pins on the proces-
sor. The reset value of IDC is undefined.
31-11 Reserved (reset value =0)
Table A-2. System Status Register (SYSTAT) Bit Descriptions (Cont’d)
Bit Name Description

Analog Devices SHARC ADSP-21368 Specifications

General

Brand	Analog Devices
Model	SHARC ADSP-21368
Category	Computer Hardware
Language	English