ADSP-21368 SHARC Processor Hardware Reference A-111
Register Reference
DAI Resistor Pull-up Enable Register
(DAI_PIN_PULLUP)
This 20-bit, read/write register is shown in Figure A-42. Bits 19–0 of this
register control the enabling/disabling 22.5 KΩ pull-up resistor on
DAI_P0[19:0]. Setting a bit to 1 enables a pull-up resistor on the corre-
sponding pin. After RESET, the value of this register is 0xFFFFF, which
means pull-ups are enabled on all 20 DAI pins.
24–17 IDP_DMAx_STAT Input Data Port DMA Status.
0 = DMA is not active
1 = DMA is active
27–25 Reserved
31–28 IDP_FIFOSZ IDP FIFO Size.
Number of samples in the IDP FIFO.
Figure A-42. DAI_PIN_PULLUP Register
Table A-45. DAI_STAT Register Bit Descriptions (Cont’d)
Bit Name Description
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
1000000000000111
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1111111111111111
Reserved
DAI_P16_PULLUP
DAI_P20_PULLUP
DAI_P19_PULLUP
DAI_P18_PULLUP
DAI_P17_PULLUP
DAI_P15_PULLUP
DAI_P14_PULLUP
DAI_P13_PULLUP
DAI_P12_PULLUP
DAI_P01_PULLUP
DAI_P02_PULLUP
DAI_P03_PULLUP
DAI_P04_PULLUP
DAI_P05_PULLUP
DAI_P06_PULLUP
DAI_P11_PULLUP
DAI_P10_PULLUP
DAI_P09_PULLUP
DAI_P07_PULLUP
DAI_P08_PULLUP
DAI_STAT (0x247D)
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