Analog Devices SHARC ADSP-21368 User Manual

ADSP-21368 SHARC Processor Hardware Reference 2-1
2 I/O PROCESSOR
In applications that use extensive off-chip data I/O, programs may find it
beneficial to use a processor resource other than the processor core to per-
form data transfers. The ADSP-21367/8/9 and ADSP-2137x processors
contain an I/O processor (IOP) that supports a variety of DMA (direct
memory access) operations. Each DMA operation transfers an entire block
of data. These operations include the transfer types listed below and
shown in Figure 2-2 on page 2-25.
• Internal memory ↔ external memory devices (through the external
port)
• Internal memory ← digital audio/digital peripheral interfaces
(DAI/DPI)
• Internal memory ↔ serial port I/O
• Internal memory ↔ serial peripheral interface I/O
• Internal memory ↔ UART I/O
• Internal memory
↔ internal memory
By managing DMA, the I/O processor frees the processor core, allowing it
to perform other operations while off-chip data I/O occurs as a back-
ground task. The multibank architecture of the internal memory allows
the core and IOP to simultaneously access the internal memory if the
accesses are to different memory banks. This means that DMA transfers to
internal memory do not impact core performance. The processor core
continues to perform computations without penalty.

Analog Devices SHARC ADSP-21368 Specifications

General

Architecture	SHARC
Core Processor	ADSP-21368
Core Clock Speed	400 MHz
Serial Ports	1
SPORTs	4
SPI Ports	1
I2C Ports	1
Timers	2
DMA Channels	14
Operating Voltage - Core	1.2 V
Operating Voltage - I/O	3.3 V
Data Bus Width	32-bit
Operating Temperature	-40°C to +85°C
Number of Cores	1
Audio Processing	Yes
Package	LQFP