Analog Devices SHARC ADSP-21368 - Page 413

ADSP-21368 SHARC Processor Hardware Reference 6-41
Serial Peripheral Interface Ports
Listing 6-2. SPI Master Mode DMA-Driven Transmit
/* SPI Control registers */
#define SPICTL (0x1000) /* SPI Control register */
#define SPIFLG (0x1001) /* SPI Flag register */
#define SPIBAUD (0x1005) /* SPI baud setup register */
/* SPI DMA registers */
#define IISPI (0x1080) /* Internal DMA address */
#define IMSPI (0x1081) /* Internal DMA access modifier */
#define CSPI (0x1082) /* Number of words to transfers */
#define CPSPI (0x1083) /* Points to next DMA parameters*/
#define SPIDMAC (0x1084) /* SPI DMA control register */
/*SPICTL bits */
#define TIMOD2 (0x0002) /* Use DMA for transfers */
#define DMISO (0x0020) /* Disable MISO pin */
#define WL32 (0x0100) /* SPI Word Length = 32 */
#define SPIMS (0x1000) /* SPI Master if 1, Slave if 0 */
#define SPIEN (0x4000) /* SPI port Enable */
/*SPIFLG bits */
#define DS0EN (0x0001) /* use FLG0 as SPI device-select*/
/*SPIDMAC bits */
#define SPIDEN (0x0001) /* enable DMA on the SPI port */
/* Default buffer size */
#define BUFSIZE 0x100
/*========================================================*/
/* Source data to be transmitted through SPI DMA */
.section/dm seg_dmda;
.var src_buf[BUFSIZE] = "source.dat";