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Analog Devices SHARC ADSP-21368 User Manual

Analog Devices SHARC ADSP-21368
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ADSP-21368 SHARC Processor Hardware Reference 4-71
Digital Audio/Digital Peripheral Interfaces
DAI_IRPTL_RE or DAI_IRPTL_FE registers enables the interrupt level on the
rising and falling edges, respectively. For more information on these regis-
ters, see “DAI Interrupt Controller Registers” on page A-112.
Programs can manage responses to signals by configuring registers. In a
sample audio application, for example, upon detection of a change of pro-
tocol, the output can be muted. This change of output and the resulting
behavior (causing the sound to be muted) results in an alert signal (an
interrupt) being introduced in response (if the detection of a protocol
change is a high priority interrupt).
L
The DAI_IRPTL_FE register can only be used for latching interrupts
on the falling edge.
Use of the DAI_IRPTL_RE or DAI_IRPTL_FE registers allows programs to
notice and respond to rising edges, falling edges, both rising and falling
edges, or neither rising nor falling edges so they can be masked separately.
Responses to changes in conditions of signals (including changes in DMA
state, introduction of error conditions, and so on) can only be enabled
using the DAI_IRPTL_RE register.
Configuring Peripherals Using SRU1
The following sections describe how the various peripherals associated
with SRU1 are configured.
Configuring the SPORTs
The serial port chapter provides the signal sensitivity information of the
SPORT signals which needs to be considered while configuring the serial
ports using DAI pins. For more information, see “Serial Port Signal Sensi-
tivity” on page 5-9.

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Analog Devices SHARC ADSP-21368 Specifications

General IconGeneral
ArchitectureSHARC
Core ProcessorADSP-21368
Core Clock Speed400 MHz
Serial Ports1
SPORTs4
SPI Ports1
I2C Ports1
Timers2
DMA Channels14
Operating Voltage - Core1.2 V
Operating Voltage - I/O3.3 V
Data Bus Width32-bit
Operating Temperature-40°C to +85°C
Number of Cores1
Audio ProcessingYes
PackageLQFP

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