ADSP-21368 SHARC Processor Hardware Reference 14-15
System Design
Listing 14-2. PMCTL Example Code
ENABLING CLKOUT:
ustat2 = dm(PMCTL);
bit set ustat2 CLKOUTEN; /* switch pin function from Reset Out
(RSTOUT) to CLKOUT */
dm(PMCTL) = ustat2;
PLL Divisor modification:
ustat2 = dm(PMCTL);
bit clr ustat2 PLLM63|PLLD8; /* clear old multiplier and
divisor*/
bit set ustat2 DIVEN|PLLD8; /* set and enable PLL Divisor for
CoreCLK = CLKIN/8 */
dm(PMCTL) = ustat2;
PLL Multiplier modification:
ustat2 = dm(PMCTL);
bit clr ustat2 PLLM63|PLLD8; /* clear old multiplier and
divisor*/
bit set ustat2 PLLM8 | PLLBP; /* set a multiplier of 8
(default divisor is 2) and put
PLL in Bypass */
dm(PMCTL) = ustat2;
waiting loop:r0 = 4096; /* wait for PLL to lock at new rate
(requirement for modifying
multiplier only) */
lcntr = r0, do pllwait until lce;
pllwait: nop;
ustat2 = dm(PMCTL);
bit clr ustat2 PLLBP; /* take PLL out of Bypass, PLL is
now at CLKIN*4 (CoreCLK = CLKIN *
M/N = CLKIN* 16/4) */
dm(PMCTL) = ustat2;