Analog Devices SHARC ADSP-21368 User Manual

ADSP-21368 SHARC Processor Hardware Reference 3-77
External Port
Listing 3-3. Nonsequential Reads With Read Optimization
I0 = sdram_addr;
M0 = 2; /* SET sdmodify to 2 */
Lcntr = 1024, do(PC,2) until lce;
R0 = R0 + R1, R0 = dm (I0, M0);
NOP;
Without read optimization, 1024 reads use 6144 processor cycles if all of
the reads are on the same page. With read optimization, 1024 reads take
7168 cycles, due to the breaking of sequential reads.
SDRAM Read Optimization Restrictions
Incorrect data may be read from external memory in the presence of the
following two types of sequences:
1. Any sequence of IOP register accesses (read or write) followed by
an external memory read causes incorrect data to be read from
external memory. For example:
r0=dm(RXSP3A);
r0=dm(ext_dest_seq_read); /* r0 is filled with the
wrong data */
To avoid this error, separate the IOP and external memory access
by adding a
NOP or any other instruction which is NOT an IOP
read/write or an external memory read.
2. In a dual-data move instruction, both accesses should not be to
external memory.
r0=dm(IOP), r8=pm(Ext_Mem);

Analog Devices SHARC ADSP-21368 Specifications

General

Architecture	SHARC
Core Processor	ADSP-21368
Core Clock Speed	400 MHz
Serial Ports	1
SPORTs	4
SPI Ports	1
I2C Ports	1
Timers	2
DMA Channels	14
Operating Voltage - Core	1.2 V
Operating Voltage - I/O	3.3 V
Data Bus Width	32-bit
Operating Temperature	-40°C to +85°C
Number of Cores	1
Audio Processing	Yes
Package	LQFP