Analog Devices SHARC ADSP-21368 User Manual (English)

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SPORT Programming Examples

5-86 ADSP-21368 SHARC Processor Hardware Reference

r0 = 0x0; dm(DIV4) = R0;

ustat3 = SPEN_A| /* Enable Channel A */

SLEN32| /* 32-bit word length */

FSR| /* Frame Sync Required */

SDEN_A; /* Enable Channel A DMA */

dm(SPCTL4) = ustat3;

_main.end: jump (pc,0);

Listing 5-2. SPORT Transmit Using Direct Core Access

/* SPORT Control Registers */

#define TXSP2A 0x460

#define RXSP3A 0x465

#define DIV2 0x402

#define DIV3 0x403

#define SPCTL2 0x400

#define SPCTL3 0x401

#define SPMCTL2 0x404

/* SPMCTL Bits */

#define SPL 0x00001000

/* SPCTL Bits */

#define SPEN_A 0x00000001

#define SDEN_A 0x00040000

#define SLEN32 0x000001F0

#define SPTRAN 0x02000000

#define IFS 0x00004000

#define FSR 0x00002000

#define ICLK 0x00000400

/* Default Buffer Length */

#define BUFSIZE 10

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Analog Devices SHARC ADSP-21368 Specifications

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