ADSP-21368 SHARC Processor Hardware Reference A-117
Register Reference
All of the DPI interrupt registers are used primarily to provide the status
of the interrupt controller. These registers are shown in Figure A-47 and
listed in Table A-47. Note that for each of these registers the bit names
and numbers are the same.
Table A-47. DPI Interrupt Registers
Register Description Address
DPI_IRPTL_RE Rising Edge Interrupt Mask Register 0x1C35
DPI_IRPTL_FE Falling Edge Interrupt Mask Register 0x1C34
DPI_IRPTL_SH DPI_IRPTL Shadow Register. Reads of this register
returns data in DPI_IRPTL without clearing con-
tents of the register.
0x1C33
Figure A-47. DPI Interrupt Latch Register
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
EXT_MISC_8_INT
EXT_MISC_7_INT
EXT_MISC_6_INT
EXT_MISC_5_INT
EXT_MISC_3_INT
UART0_TX_INT
UART1_TX_INT
UART1_RX_INT
UART0_RX_INT
EXT_MISC_1_INT
TWI_INT
EXT_MISC_0_INT
EXT_MISC_2_INT
EXT_MISC_4_INT
Reserved
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0000000000000000
Reserved
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