ADSP-21368 SHARC Processor Hardware Reference 2-43
I/O Processor
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Writing an address to the CPSPI register does not begin a chained
DMA sequence unless the IISPI, IMSPI, and CSPI registers are ini-
tialized, SPI DMA is enabled, the SPI port is enabled, and SPI
DMA chaining is enabled.
The sequence for setting up and starting a chained DMA is outlined in the
following steps and can also be seen in Listing 6-3 on page 6-43.
1. Configure the TCB associated with each DMA in the chain except
for the first DMA in the chain.
2. Write the first three parameters for the initial DMA to the IISPI,
IMSPI, and CSPI registers directly.
3. Select a baud rate using the SPIBAUD register.
4. Select which flag to use as the SPI slave select signal in the SPIFLG
register.
5. Configure and enable the SPI port with the SPICTL register.
6. Configure the DMA settings for the entire sequence, enabling
DMA and DMA chaining in the SPIDMAC register.
7. Begin the DMA by writing the address of a TCB (describing the
second DMA in the chain) to the CPSPI register.
The address field of the chain pointer registers is only 19 bits wide. If a
program writes a symbolic address to bit 19 of the chain pointer, there
may be a conflict with the
PCI bit. Programs should clear the upper bits of
the address, then AND the PCI bit separately, if needed. For example:
R0 = next_TCB+3; /* addr of next chain */
R1 = 0x7FFFF; /* mask 19 bits */
R0 = R0 or R1;
CPSPI = R0;
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