ADSP-21368 SHARC Processor Hardware Reference 3-7
External Port
In other words, the 32-entry 2-way set-associative cache in the SHARC
has been modified to act as an instruction cache when the program
sequencer executes instructions from external memory, while continuing
to work as the traditional conflict cache when the sequencer executes
instructions located in internal memory. This context switching from con-
flict cache to instruction cache and vice-versa happens automatically
without the need for any user intervention.
The first time that an instruction from a particular address is fetched from
external memory, there is a cache miss when the sequencer looks for this
instruction within the cache. Consequently, the instruction has to be
fetched from external memory and a copy of instruction is stored in cache.
Upon subsequent executions of this instruction, the sequencer search
results in a cache hit, resulting in the instruction being fetched from cache
instead of external memory. This allows for an instruction throughput
that is equivalent to internal memory execution.
This context-dependent caching preserves the cache performance of the
traditional SHARC conflict cache as well as significantly improving pro-
gram instruction throughput for repetitive instructions such as those
inside loops when executing from external memory. Analyses of typical
application code examples have shown that this 32-entry instruction cache
improves execution throughput by 50-80% over not having this cache.
In general, cache hits occur for all instructions which are fetched and exe-
cuted multiple times (for example loops, subroutine calls, negative
branches, and so on). Typical applications, such as signal processing algo-
rithms, are ideal candidates for significant performance improvements as a
result of the cache.
An important and significant result of the instruction being fetched from
the cache is that it frees up the external port as well as the internal PM and
DM buses for other operations such as data transfers, operand fetches, or
DMA transfers.
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