ADSP-21368 SHARC Processor Hardware Reference 4-55
Digital Audio/Digital Peripheral Interfaces
Figure 4-46. SRU2_INPUT5 Register
Table 4-11. Group A Connections
Binary Decimal Signal Description
00000 00 LOGIC_LEVEL_LOW Logic level low (0)
00001 01 LOGIC_LEVEL_HIGH logic level high (1)
00010 02 DPI_P01_O External pin 1
00011 03 DPI_P02_O External pin 2
00100 04 DPI_P03_O External pin 3
00101 05 DPI_P04_O External pin 4
00110 06 DPI_P05_O External pin 5
00111 07 DPI_P06_O External pin 6
01000 08 DPI_P07_O External pin 7
01001 09 DPI_P08_O External pin 8
01010 10 DPI_P09_O External pin 9
01011 11 DPI_P10_O External pin 10
01100 12 DPI_P11_O External pin 11
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0000000000000000
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
MISC8_I
Miscellaneous 8 Input
MISC6_I
Miscellaneous 6 Input
MISC7_I
Miscellaneous 7 Input
MISC5_I
Miscellaneous 5 Input
MISC4_I
Miscellaneous 4 Input
MISC3_I
Miscellaneous 3 Input
SRU2_INPUT5
(0x1C05)
MISC6_I
Miscellaneous 6 Input
Reset = 0x00000000
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